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CPU Microarchitecture & Logic Design - Full time - Santa Clara California
Company: Rival
Location: Santa Clara, California
Posted On: 11/07/2024
Positions are open for full-time in the areas of CPU microarchitecture and logic design, in the areas of memory management, load/store pipeline, cache, power management, debug features, and bus interface designs. We are looking for junior to mid-level of talent, from new college grads to about ten years of experience.Responsibilities - Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
- Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
- Validation - support test bench development and simulation for functional and performance verification
- Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
- Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and powerRequirements
- Thorough knowledge of microprocessor architecture and microarchitecture in one or more of the following areas:memory management, load/store execution, cache and memory subsystems, bus interface, debug features, and power management
- Knowledge of System Verilog
- Experience with simulators and waveform debugging tools
- Knowledge of logic design principles along with timing and power implications
- Understanding of low power microarchitecture techniques
- Understanding of high performance techniques and trade-offs in a CPU microarchitecture
- Experience in C or C++ programming
- Experience using an interpretive language such as Perl or PythonEducation and Experience
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